Wada, Muto and Sanuki presented at 252th System Architecture Conference, the 208th System and LSI Design Technology Conference, and the 68th Embedded Systems Joint Research Presentation (ETNET2025).
URL: https://www.ipsj.or.jp/kenkyukai/event/arc252sldm208emb68.html
March 18 (Thu), 09:00-10:20
[CPSY+DC] High Reliability
(2) Kohei Wada and Nobuyuki Yamasaki, “Design of a Lightweight Codec for Error-Free POF”
March 18 (Fri), 10:35-12:35
[CPSY+ARC] Processor Architecture
(17) Keita Muto and Nobuyuki Yamasaki, “Design of a Compute Unit for GPGPU Using RISC-V ISA”
(19) Haruka Sanuki, Nobuyuki Yamasaki, “Design and Implementation of iRMTvisor: A Hypervisor for RMT Processors with IPC Control”
