Yamasaki Lab

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Shota Nakabeppu received the Young Researcher Award from the System Architecture (ARC) Workshop.

• Shota Nakabefu, Nobuyuki Yamazaki, “Non-stop Processor Using MTJ-based Non-volatile Devices”, Presented at the ARC Workshop, March 2024

Wada, Muto and Sanuki presented at 252th System Architecture Conference, the 208th System and LSI Design Technology Conference, and the 68th Embedded Systems Joint Research Presentation (ETNET2025).

URL: https://www.ipsj.or.jp/kenkyukai/event/arc252sldm208emb68.html

March 18 (Thu), 09:00-10:20
[CPSY+DC] High Reliability
(2) Kohei Wada and Nobuyuki Yamasaki, “Design of a Lightweight Codec for Error-Free POF”

March 18 (Fri), 10:35-12:35
[CPSY+ARC] Processor Architecture
(17) Keita Muto and Nobuyuki Yamasaki, “Design of a Compute Unit for GPGPU Using RISC-V ISA”
(19) Haruka Sanuki, Nobuyuki Yamasaki, “Design and Implementation of iRMTvisor: A Hypervisor for RMT Processors with IPC Control”

Sato and Yamazawa presented at The Twelfth International Symposium on Computing and Networking (CANDAR2024).

URL: https://is-candar.org/

November 27th (Wed) 13:30-15:10
“A Learning-based Control Scheme for Prioritized SMT Processor”, Kaname Sato and Nobuyuki Yamasaki

November 28th (Thu) 10:45-12:25
“Context Cache for Multicore RISC-V Processor”, Akira Yamazawa, Tsutomu Itou, Kazutoshi Suito and Nobuyuki Yamasaki

November 20 (Wed) – 22 (Fri), 2024 | Pacifico Yokohama

Yamasaki Laboratory will exhibit its project at EdgeTech+ 2024, a comprehensive exhibition focused on accelerating the social implementation of innovation through edge technologies. The event will be held at Pacifico Yokohama from November 20 (Wednesday) to 22 (Friday), 2024.

EdgeTech+ is a platform that adds new value to edge technologies, driven by customer-centric innovation. It is a comprehensive exhibition where visitors can explore the latest technologies essential for driving business transformation.

We invite you to visit and explore our booth at the event.

For more information about EdgeTech+ 2024, please visit [this page].

For details about Yamasaki Laboratory’s booth, please click [here].

We exhibited at University Fair 2024 – Innovation Japan, held at Tokyo Big Sight on August 22(Thu) – August 23(Fri).

Our exhibit featured the theme: “Non-stop Processor/SoC/SiP for Embedded Systems.”

For more details about University Fair 2024, please refer to [this page]

Our lab camp was held on July 25(Thu) – July 26(Fri).

This year, we visited Nasu Highlands in Tochigi Prefecture, where we enjoyed athletic activities, barbecuing, and fishing.

Nakabeppu, Nojiri and Yamazawa presented at 248th System Architecture Conference, the 205th System and LSI Design Technology Conference, and the 65th Embedded Systems Joint Research Presentation (ETNET2024).

URL: https://www.ipsj.or.jp/kenkyukai/event/arc248sldm205emb65.html

March 21 (Thu), 09:00-10:40
[CPSY+ARC] Optimization and Power Efficiency
(2) Shota Nakabeppu and Nobuyuki Yamasaki, “Non-stop Processor Using MTJ-based Non-volatile Devices”

March 22 (Fri), 09:00-10:40
[CPSY+ARC] Processor Architecture
(17) Yuta Nojiri and Nobuyuki Yamasaki, “
Design of a RISC-V SMT Processor for Real-Time Systems”
(19) Akira Yamazawa, Tsutomu Ito, Kazuhisa Suitou, Nobuyuki Yamasaki, “Design of Context Cache for Multi-core RISC-V Processors”

We opened pages for B3.

Don’t miss it!!!