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(JAPANESE/日本語) EdgeTech+ 2024
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(JAPANESE/日本語) 大学見本市2024に出典
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(JAPANESE/日本語) 研究室合宿2024
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(JAPANESE/日本語) ETNET2024にて口頭発表
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(JAPANESE/日本語) B3向け研究室紹介ページ公開
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ETNET 2023
Nojiri and Magara presented at CPSY/IPSJ-EMB/IPSJ-SLDM/DC.
URL: https://www.ipsj.or.jp/kenkyukai/event/arc244sldm202emb62.html
Yuta Nojiri and Nobuyuki Yamasaki, “Design of RMTP based multithreaded RISC-V processor” IEICE Technical Report, Mar 2023.
Takero Magara and Nobuyuki Yamasaki, “Design of Decoded Instruction Cache” IEICE Technical Report, Mar 2023.
Pages for B3
We opened pages for B3.
Don’t miss it!!!
EdgeTech+2022
We will be exhibited at EdgeTech+2022, which will be held in PACIFICO YOKOHAMA on November 16th (Wed.) to 18th (Fri.), 2022.
ETNET 2022
Makino, Nagura and Yashima presented at CPSY/IPSJ-EMB/IPSJ-SLDM/DC.
Masanari Makino and Nobuyuki Yamasaki, “Design of RMTvisor Hypervisor for RMT Processor” IEICE Technical Report, Mar 2022.
Reo Nagura and Nobuyuki Yamasaki, “Imprecise Mixed Criticality Scheduling for SMT Processor” IEICE Technical Report, Mar 2022.
Kosuke Yashima and Nobuyuki Yamasaki, “Efficient Mixed Criticality System using fluid scheduling” IEICE Technical Report, Mar2022.