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(JAPANESE/日本語) ETNET2025にて口頭発表
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(JAPANESE/日本語) CANDAR2024にて口頭発表
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(JAPANESE/日本語) EdgeTech+ 2024
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(JAPANESE/日本語) 大学見本市2024に出典
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(JAPANESE/日本語) 研究室合宿2024
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(JAPANESE/日本語) ETNET2024にて口頭発表
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(JAPANESE/日本語) B3向け研究室紹介ページ公開
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ETNET 2023
Nojiri and Magara presented at CPSY/IPSJ-EMB/IPSJ-SLDM/DC.
URL: https://www.ipsj.or.jp/kenkyukai/event/arc244sldm202emb62.html
Yuta Nojiri and Nobuyuki Yamasaki, “Design of RMTP based multithreaded RISC-V processor” IEICE Technical Report, Mar 2023.
Takero Magara and Nobuyuki Yamasaki, “Design of Decoded Instruction Cache” IEICE Technical Report, Mar 2023.
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