Makino, Nagura and Yashima presented at CPSY/IPSJ-EMB/IPSJ-SLDM/DC.
Masanari Makino and Nobuyuki Yamasaki, “Design of RMTvisor Hypervisor for RMT Processor” IEICE Technical Report, Mar 2022.
Reo Nagura and Nobuyuki Yamasaki, “Imprecise Mixed Criticality Scheduling for SMT Processor” IEICE Technical Report, Mar 2022.
Kosuke Yashima and Nobuyuki Yamasaki, “Efficient Mixed Criticality System using fluid scheduling” IEICE Technical Report, Mar2022.