ESS2015

Dr. Chishiro and Hagiwara presented at ESS in Waseda, Japan.

Hiroki Watanabe, Keigo Mizotani, Yusuke Hatori, Hiroyuki Chishiro and Nobuyuki Yamasaki, “A Low Latency Real-Time Execution with Interrupt Wake-up Structure”, ESS2015 collection of papers, Oct 2015.

Shuma Hagiwara, Kohei Ohsawa and Nobuyuki Yamasaki, “Power Consumption Reduction Method of Real-time Communication Responsive Link”, ESS2015 collection of papers, Oct 2015.

Best Paper Award at CATA2015

Mizotani won the Best Paper Award at the 30th International Conference on Computers and Their Applications (CATA2015).

Keigo Mizotani, Yusuke Hatori, Masayoshi Takasu, Yusuke Kumura, Hiroyuki Chishiro, and Nobuyuki Yamasaki, “An Integration of Imprecise Computation Model and Real-Time Voltage and Frequency Scaling,” In Proceedings of the 30th International Conference on Computers and Their Applications, March 2015.

BEST PAPER AWARD

CATA2015

Dr. Chishiro, Mizotani, Takasu, and Kumura presented at the 30th International Conference on Computers and Their Applications (CATA2015) in Hawaii, USA.

Hiroyuki Chishiro and Nobuyuki Yamasaki, “Zero-Jitter Technique for Semi-Fixed-Priority Scheduling with Harmonic Periodic Task Sets,” In Proceedings of the 30th International Conference on Computers and Their Applications, March 2015.

Keigo Mizotani, Yusuke Hatori, Masayoshi Takasu, Yusuke Kumura, Hiroyuki Chishiro, and Nobuyuki Yamasaki, “An Integration of Imprecise Computation Model and Real-Time Voltage and Frequency Scaling,” In Proceedings of the 30th International Conference on Computers and Their Applications, March 2015.

Masayoshi Takasu, Keigo Mizotani, Yusuke Kumura, Hiroyuki Chishiro, and Nobuyuki Yamasaki, “Leakage-Aware Partitioning of Real-Time Tasks for Multiprocessor Systems,” In Proceedings of the 30th International Conference on Computers and Their Applications, March 2015.

Yusuke Kumura, Keigo Mizotani, Masayoshi Takasu, Hiroyuki Chishiro, and Nobuyuki Yamasaki, “Overhead-Aware Schedulability Analysis on 8-way SMT Processor,” In Proceedings of the 30th International Conference on Computers and Their Applications, March 2015.

ETNET2015

Murata, Matsui, and Yamada presented at CPSY/IPSJ-EMB/IPSJ-SLDM/DC in Amami, Japan.

Taro Murata, Kensuke Kaneda, Masayoshi Takasu, Keigo Mizotani, Yusuke Hatori, and Nobuyuki Yamasaki, “A Resource Utilization Aware Method to Improve Throughput on RMT Processor,” IEICE Technical Report, Mar 2015.

Tsukasa Matsui, Shuma Matsui, Keigo Mizotani, and Nobuyuki Yamasaki, “Adaptive Error Correcting Code by Priority on RMT Processor,” IEICE Technical Report, Mar 2015.

Kenji Yamada, Yusuke Hatori, Shuma Hagiwara, Keigo Mizotani, Masayoshi Takasu, and Nobuyuki Yamasaki, “Real-Time Static Voltage and Frequency Scaling on RMT Processor using Instructions Per Clock Cycle Control,” IEICE Technical Report, Mar 2015.